Specialized Distributed Hardware Design for Real-Time Atmospheric Turbulence Mitigation Error Correction Calculation
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This thesis demonstrates an approach to solve execution challenges of Image processing of an Atmospheric turbulence mitigation technique in real-time. An atmospheric turbulence mitigation technique is used to eliminate the aberrations caused by turbulence in the images. The error calculation is a mathematically intensive process, that includes Fast Fourier Transform (FFT) to convert the image from the spatial domain to the spatial frequency domain. The FPGA based hardware accelerator design and architectures are investigated in this work to perform Fast Fourier Transform and error calculations in real-time, defined as 30Hz. A scalable and parallel platform is designed to execute the arithmetic operations in high-speed using a distributed system. The execution process is spread among multiple hardware devices that implements a pipeline technique to achieve faster throughput. Using the distributed network design of the hardware accelerators, the error correction calculation is computed with better speed than the system with single-hardware device.